In multi-processor systems, multiple processors may be connected via one or more video bridges. During use, the bridge may be utilized for use of one or more additional processors for distributed processing. Currently, input/output resources of the one or more additional processors may be disabled when distributed processing is not being utilized. However, a head of such one or more additional processors remains enabled even when distributed processing is not being utilized, resulting in wasted power.
There is thus a need for addressing these and/or other issues associated with the prior art.